Son Tran's research interests are in the development of processes and materials for advanced semiconductor packaging, including heterogeneous 2.5 and 3D integration with fine-pitch, high-density interconnections and hybrid bonding structures. His focus is in operating surface mount technology (SMT) assembly in the Smart Electronics Manufacturing Laboratory (SEML) at °®¶¹´«Ã½, where he conducts experiments and build prototypes for reliability testing. This work supports both educational and industrial objectives.
Son K. Tran
Research Scientist
Integrated Electronics Engineering Center (IEEC)
Background
Research Interests